[Assemble language]89c52 Emulator 接 AD667 |
答題得分者是:ssejack
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cyw1984
一般會員 發表:45 回覆:67 積分:22 註冊:2005-06-25 發送簡訊給我 |
要測試這個線路的ASSEMBLE 應怎樣寫?? #program 上改動 那12BIT的數值 *****
P1...接dac的12bit
p3.2是CS
P3.0是 A0,A1
P3.1是A2,A3 ogh 00h
LJMP MAIN MAIN: MOV a,#0ffh <----測試的數值
MOV P1, A
SETB P3.2
SETB P3.0
CPL P3.1 END 就這樣可以嗎??
但是我試了還是不能..有人能幫到我嗎??? 發表人 - cyw1984 於 2005/09/12 21:36:03
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cyw1984
一般會員 發表:45 回覆:67 積分:22 註冊:2005-06-25 發送簡訊給我 |
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ssejack
高階會員 發表:87 回覆:143 積分:106 註冊:2005-06-27 發送簡訊給我 |
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cyw1984
一般會員 發表:45 回覆:67 積分:22 註冊:2005-06-25 發送簡訊給我 |
1. If I use only one AD667
May I use the 8051 port to control trigger the CS without Address decoder?? Port 3.2,Is it OK??
Thanks I fixed my program............ (p3.2 is CS
P3.0 is A0,A1
P3.1 is A2,A3 ) <---IS IT OK???HAVE PROBLEM?? ogh 00h
LJMP MAIN MAIN: MOV a,#111111111111B ;test values MOV P1, A
CRL P3.2 ; trigger the AD667
NOP
NOP
SETB P3.1
CPL P3.0 ; enable 8 LSB to first latch
CPL P3.1
SETB P3.0; enable 4 MSB to first latch and load the first latch to second latch
NOP
NOP
SETB P3.2 ; No operation of AD667 END Is it correct??
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ssejack
高階會員 發表:87 回覆:143 積分:106 註冊:2005-06-27 發送簡訊給我 |
Hi CYW1984:
First, you should decide which method to control the AD667.
******************
A. 4 bits bus
******************
1./CS go low to active AD667
2.Set [A3:A0] to 1110B to active 4LSB of 1st rank
3.Set [D3:D0] data to DB bus of AD667
4.Crate a negative pulse for /WR let AD667 latch data to 1st rank.
5.Set [A3:A0] to 1101B to active 4 Middle bits of 1st rank
6.Set [D7:D3] data to DB bus of AD667
7.Crate a negative pulse for /WR let AD667 latch data to 1st rank.
8.Set [A3:A0] to 1011B to active 4 MSB bits of 1st rank
9.Set [D11:D8] data to DB bus of AD667
10.Crate a negative pulse for /WR let AD667 latch data to 1st rank.
11.Set [A3:A0] to 0111B to active load data form 1st rank to 2nd rank
12.Crate a negative pulse for /WR let AD667 latch data to 2nd rank.
13. Set /CS go high
14. Set NOP code to avoid un-know situation.
******************
B. 12 bits bus
******************
1./CS go low to active AD667
2.Set [A3:A0] to 0000B to latch transparent
3.Set [D11:D0] data to DB bus of AD667
4.Crate a negative pulse for /WR let AD667 latch data to 1st rank.
5. Set /CS go high
6. Set NOP code to avoid un-know situation. So AD667 only support 2 method to operation, 1st be configuration on 4 bits system and 2nd method can operation on 12 or 16 bits system. you can configuration your 8051 mapping the 12bits bus
(P2[3:0] P1[7:0]) with other control signal
(may P2[7:4] map to A[3:0], P3 control /CS,/WR).. Finally, I make sure the /WR signal of 8051 only active when MOVX be excuting.(external IO write); If you insit to use MOV insruction, should use another pin to control /WR of AD667.
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ssejack
高階會員 發表:87 回覆:143 積分:106 註冊:2005-06-27 發送簡訊給我 |
Sorry! you have another question for the input rigion;
The spec. of AD667 can operate between -10 and +10 V when device supply +/- 12.5V.
May you addition an attenuator (x3 ) to reduce input swing to +/-4V then you can select +/-5V mode to get the best resolution!!
+/-12V can input to AD667 without damege but over +/-10V region
may no effect on the digital output code.
(exp 10V -> 0x0fff & 10.1 to 12V still output 0x0fff)
Data-sheet
http://www.analog.com/UploadedFiles/Data_Sheets/88155358AD667_a.pdf
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ssejack
高階會員 發表:87 回覆:143 積分:106 註冊:2005-06-27 發送簡訊給我 |
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cyw1984
一般會員 發表:45 回覆:67 積分:22 註冊:2005-06-25 發送簡訊給我 |
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